チップアセンブリ/テスト
チップアセンブリ/テスト
Design service Lab provide test chip engineer testing service based on wafer and package sort. The test chips include SOC, NVM memory/Library IP, high speed interface IP, Mixed signal and RF IP. The lab can also support DIP,COB, QFP quick package.
IP Testing
SoC Testing
Bonding Service
RF wafer level testing
For more information, please contact your account manager or login to SMIC NOW